In the manufacture of semiconductor devices shallow trench isolation (STI) is a well-known technique for isolating individual devices in a semiconductor integrated circuit. Shallow trench isolation often creates structures in which a “step down” occurs where the active silicon ends and the shallow trench begins. The “step down” is from the active silicon to the material that is used to fill the shallow trench. The material that is used to fill the trench is usually deposited silicon dioxide.
In prior art metal oxide semiconductor (MOS) devices when a layer of gate poly steps over the “step down” location, it has been noted that problems arise with the integrity of an underlying gate oxide layer. Therefore, there is a need in the art for a system and method that is capable of increasing the integrity of a gate oxide layer during a manufacturing process of a semiconductor device. In particular, there is a need in the art for a system and method that is capable of increasing the integrity of an underlying gate oxide layer near a “step down” location of a shallow trench structure in a semiconductor device.